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Overview
The U-boot boot process, using Xilinx ZCU102 (Rev 1.0) as an example.
arch/arm/cpu/armv8/start.S
/*************************************************************************
*
* Startup Code (reset vector)
*
*************************************************************************/
...
master_cpu:
bl _main
arch/arm/lib/crt0_64.S [ENTRY(_main)]
1.
* This file handles the target-independent stages of the U-Boot
* start-up where a C runtime environment is needed. Its entry point
* is _main and is branched into from the target's start.S file.
*
* _main execution sequence is:
*
* 1. Set up initial environment for calling board_init_f().
* This environment only provides a stack and a place to store
* the GD ('global data') structure, both located in some readily
* available RAM (SRAM, locked cache...). In this context, VARIABLE
* global data, initialized or not (BSS), are UNAVAILABLE; only
* CONSTANT initialized data are available. GD should be zeroed
* before board_init_f() is called.
ENTRY(_main)
/*
* Set up initial C runtime environment and call board_init_f(0).
*/
#if defined(CONFIG_TPL_BUILD) && defined(CONFIG_TPL_NEEDS_SEPARATE_STACK)
ldr x0, =(CONFIG_TPL_STACK)
#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
ldr x0, =(CONFIG_SPL_STACK)
#elif defined(CONFIG_INIT_SP_RELATIVE)
adr x0, __bss_start
add x0, x0, #CONFIG_SYS_INIT_SP_BSS_OFFSET
#else
ldr x0, =(CONFIG_SYS_INIT_SP_ADDR)
#endif
bic sp, x0, #0xf /* 16-byte alignment for ABI compliance */
mov x0, sp
bl board_init_f_alloc_reserve
mov sp, x0
/* set up gd here, outside any C code */
mov x18, x0
bl board_init_f_init_reserve
2.
* 2. Call board_init_f(). This function prepares the hardware for * execution from system RAM (DRAM, DDR...) As system RAM may not * be available yet, , board_init_f() must use the current GD to * store any data which must be passed on to later stages. These * data include the relocation destination, the future stack, and * the future GD location.
mov x0, #0
bl board_init_f
3.
* 3. Set up intermediate environment where the stack and GD are the * ones allocated by board_init_f() in system RAM, but BSS and * initialized non-const data are still not available.
4a.
* 4a.For U-Boot proper (not SPL), call relocate_code(). This function * relocates U-Boot from its current location into the relocation * destination computed by board_init_f().
4b.
* 4b.For SPL, board_init_f() just returns (to crt0). There is no * code relocation in SPL.
5.
* 5. Set up final environment for calling board_init_r(). This * environment has BSS (initialized to 0), initialized non-const * data (initialized to their intended value), and stack in system * RAM (for SPL moving the stack and GD into RAM is optional - see * CONFIG_SPL_STACK_R). GD has retained values set by board_init_f().
6.
* 6. For U-Boot proper (not SPL), some CPUs have some work left to do * at this point regarding memory, so call c_runtime_cpu_setup.
7.
* 7. Branch to board_init_r().
common/board_f.c
common/board_r.c (only most common)
initr_dm() [C]
board_init() [A,B]
board_early_init_r() (not for Zynq)
arch_early_init_r() [A]
- arch/arm/mach-zynq/cpu.c
- arch/arm/mach-zynq/spl.c
#if defined(CONFIG_ARCH_EARLY_INIT_R)
int arch_early_init_r(void)
{
#if (defined(CONFIG_FPGA) && !defined(CONFIG_SPL_BUILD)) || \
(defined(CONFIG_SPL_FPGA_SUPPORT) && defined(CONFIG_SPL_BUILD))
int cpu_id = cpu_desc_id();
if (cpu_id < 0)
return 0;
fpga.size = zynq_fpga_descs[cpu_id].fpga_size;
fpga.name = zynq_fpga_descs[cpu_id].devicename;
fpga_init();
fpga_add(fpga_xilinx, &fpga);
#endif
return 0;
}
#endif
initr_mmc() [C]
#ifdef CONFIG_MMC
static int initr_mmc(void)
{
puts("MMC: ");
mmc_initialize(gd->bd);
return 0;
}
#endif
initr_env() [C]
static int initr_env(void)
{
/* initialize environment */
if (should_load_env())
env_relocate();
else
set_default_env(NULL, 0);
#ifdef CONFIG_OF_CONTROL
env_set_hex("fdtcontroladdr",
(unsigned long)map_to_sysmem(gd->fdt_blob));
#endif
/* Initialize from environment */
load_addr = env_get_ulong("loadaddr", 16, load_addr);
return 0;
}
show_board_info() [C]
From common/board_info.c:
int __weak checkboard(void)
{
return 0;
}
/*
* If the root node of the DTB has a "model" property, show it.
* Then call checkboard().
*/
int __weak show_board_info(void)
{
#ifdef CONFIG_OF_CONTROL
DECLARE_GLOBAL_DATA_PTR;
const char *model;
model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
if (model)
printf("Model: %s\n", model);
#endif
return checkboard();
}
For zynqmp.c:
int checkboard(void)
{
puts("Board: Xilinx ZynqMP\n");
return 0;
}
arch_misc_init()
Some arches and boards, not Zynq.
#ifdef CONFIG_ARCH_MISC_INIT
arch_misc_init,
#endif
misc_init_r()
#ifdef CONFIG_MISC_INIT_R
misc_init_r,
#endif
initr_enable_interrupts()
#ifdef CONFIG_ARM
static int initr_enable_interrupts(void)
{
enable_interrupts();
return 0;
}
#endif
From arch/arm/lib/interrupts.c:
int interrupt_init (void)
{
/*
* setup up stacks if necessary
*/
IRQ_STACK_START_IN = gd->irq_sp + 8;
return 0;
}
void enable_interrupts (void)
{
return;
}
int disable_interrupts (void)
{
return 0;
}
initr_ethaddr() [C]
#ifdef CONFIG_CMD_NET
initr_ethaddr,
#endif
#ifdef CONFIG_CMD_NET
static int initr_ethaddr(void)
{
bd_t *bd = gd->bd;
/* kept around for legacy kernels only ... ignore the next section */
eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
#ifdef CONFIG_HAS_ETH1
eth_env_get_enetaddr("eth1addr", bd->bi_enet1addr);
#endif
#ifdef CONFIG_HAS_ETH2
eth_env_get_enetaddr("eth2addr", bd->bi_enet2addr);
#endif
#ifdef CONFIG_HAS_ETH3
eth_env_get_enetaddr("eth3addr", bd->bi_enet3addr);
#endif
#ifdef CONFIG_HAS_ETH4
eth_env_get_enetaddr("eth4addr", bd->bi_enet4addr);
#endif
#ifdef CONFIG_HAS_ETH5
eth_env_get_enetaddr("eth5addr", bd->bi_enet5addr);
#endif
return 0;
}
#endif /* CONFIG_CMD_NET */
board_late_init() [B]
(Defined in board/xilinx/zynq/board.c.)
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init,
#endif
initr_net()
#ifdef CONFIG_CMD_NET
static int initr_net(void)
{
puts("Net: ");
eth_initialize();
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
return 0;
}
#endif