Kernel/device tree info for Avnet ZedBoard.

/dts-v1/;
#include "zynq-7000.dtsi"

/ {
        model = "Avnet ZedBoard board";
        compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000";

        aliases {
                ethernet0 = &gem0;
                serial0 = &uart1;
                mmc0 = &sdhci0;
        };

        memory@0 {
                device_type = "memory";
                reg = <0x0 0x20000000>;
        };

        chosen {
                bootargs = "";
                stdout-path = "serial0:115200n8";
        };

        usb_phy0: phy0 {
                compatible = "usb-nop-xceiv";
                #phy-cells = <0>;
        };
};

&clkc {
        ps-clk-frequency = <33333333>;
};

&gem0 {
        status = "okay";
        phy-mode = "rgmii-id";
        phy-handle = <&ethernet_phy>;

        ethernet_phy: ethernet-phy@0 {
                reg = <0>;
                device_type = "ethernet-phy";
        };
};

&sdhci0 {
        status = "okay";
};

&uart1 {
        status = "okay";
};

&usb0 {
        status = "okay";
        dr_mode = "host";
        usb-phy = <&usb_phy0>;
};

uart0: serial@e0000000 {
        compatible = "xlnx,xuartps", "cdns,uart-r1p8";
        status = "disabled";
        clocks = <&clkc 23>, <&clkc 40>;
        clock-names = "uart_clk", "pclk";
        reg = <0xE0000000 0x1000>;
        interrupts = <0 27 4>;
};

uart1: serial@e0001000 {
        compatible = "xlnx,xuartps", "cdns,uart-r1p8";
        status = "disabled";
        clocks = <&clkc 24>, <&clkc 41>;
        clock-names = "uart_clk", "pclk";
        reg = <0xE0001000 0x1000>;
        interrupts = <0 50 4>;
};

&uart1 {
        status = "okay";
};

usb0: usb@e0002000 {
        compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
        status = "disabled";
        clocks = <&clkc 28>;
        interrupt-parent = <&intc>;
        interrupts = <0 21 4>;
        reg = <0xe0002000 0x1000>;
        phy_type = "ulpi";
};

usb1: usb@e0003000 {
        compatible = "xlnx,zynq-usb-2.20a", "chipidea,usb2";
        status = "disabled";
        clocks = <&clkc 29>;
        interrupt-parent = <&intc>;
        interrupts = <0 44 4>;
        reg = <0xe0003000 0x1000>;
        phy_type = "ulpi";
};

&usb0 {
        status = "okay";
        dr_mode = "host";
        usb-phy = <&usb_phy0>;
};

gem0: ethernet@e000b000 {
        compatible = "cdns,zynq-gem", "cdns,gem";
        reg = <0xe000b000 0x1000>;
        status = "disabled";
        interrupts = <0 22 4>;
        clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
        clock-names = "pclk", "hclk", "tx_clk";
        #address-cells = <1>;
        #size-cells = <0>;
};

gem1: ethernet@e000c000 {
        compatible = "cdns,zynq-gem", "cdns,gem";
        reg = <0xe000c000 0x1000>;
        status = "disabled";
        interrupts = <0 45 4>;
        clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
        clock-names = "pclk", "hclk", "tx_clk";
        #address-cells = <1>;
        #size-cells = <0>;
};

&gem0 {
        status = "okay";
        phy-mode = "rgmii-id";
        phy-handle = <&ethernet_phy>;

        ethernet_phy: ethernet-phy@0 {
                reg = <0>;
                device_type = "ethernet-phy";
        };
};

gpio0: gpio@e000a000 {
        compatible = "xlnx,zynq-gpio-1.0";
        #gpio-cells = <2>;
        clocks = <&clkc 42>;
        gpio-controller;
        interrupt-controller;
        #interrupt-cells = <2>;
        interrupt-parent = <&intc>;
        interrupts = <0 20 4>;
        reg = <0xe000a000 0x1000>;
};

spi0: spi@e0006000 {
        compatible = "xlnx,zynq-spi-r1p6";
        reg = <0xe0006000 0x1000>;
        status = "disabled";
        interrupt-parent = <&intc>;
        interrupts = <0 26 4>;
        clocks = <&clkc 25>, <&clkc 34>;
        clock-names = "ref_clk", "pclk";
        #address-cells = <1>;
        #size-cells = <0>;
};

spi1: spi@e0007000 {
        compatible = "xlnx,zynq-spi-r1p6";
        reg = <0xe0007000 0x1000>;
        status = "disabled";
        interrupt-parent = <&intc>;
        interrupts = <0 49 4>;
        clocks = <&clkc 26>, <&clkc 35>;
        clock-names = "ref_clk", "pclk";
        #address-cells = <1>;
        #size-cells = <0>;
};

i2c0: i2c@e0004000 {
        compatible = "cdns,i2c-r1p10";
        status = "disabled";
        clocks = <&clkc 38>;
        interrupt-parent = <&intc>;
        interrupts = <0 25 4>;
        reg = <0xe0004000 0x1000>;
        #address-cells = <1>;
        #size-cells = <0>;
};

i2c1: i2c@e0005000 {
        compatible = "cdns,i2c-r1p10";
        status = "disabled";
        clocks = <&clkc 39>;
        interrupt-parent = <&intc>;
        interrupts = <0 48 4>;
        reg = <0xe0005000 0x1000>;
        #address-cells = <1>;
        #size-cells = <0>;
};

sdhci0: mmc@e0100000 {
        compatible = "arasan,sdhci-8.9a";
        status = "disabled";
        clock-names = "clk_xin", "clk_ahb";
        clocks = <&clkc 21>, <&clkc 32>;
        interrupt-parent = <&intc>;
        interrupts = <0 24 4>;
        reg = <0xe0100000 0x1000>;
};

sdhci1: mmc@e0101000 {
        compatible = "arasan,sdhci-8.9a";
        status = "disabled";
        clock-names = "clk_xin", "clk_ahb";
        clocks = <&clkc 22>, <&clkc 33>;
        interrupt-parent = <&intc>;
        interrupts = <0 47 4>;
        reg = <0xe0101000 0x1000>;
};

&sdhci0 {
        status = "okay";
};

can0: can@e0008000 {
        compatible = "xlnx,zynq-can-1.0";
        status = "disabled";
        clocks = <&clkc 19>, <&clkc 36>;
        clock-names = "can_clk", "pclk";
        reg = <0xe0008000 0x1000>;
        interrupts = <0 28 4>;
        interrupt-parent = <&intc>;
        tx-fifo-depth = <0x40>;
        rx-fifo-depth = <0x40>;
};

can1: can@e0009000 {
        compatible = "xlnx,zynq-can-1.0";
        status = "disabled";
        clocks = <&clkc 20>, <&clkc 37>;
        clock-names = "can_clk", "pclk";
        reg = <0xe0009000 0x1000>;
        interrupts = <0 51 4>;
        interrupt-parent = <&intc>;
        tx-fifo-depth = <0x40>;
        rx-fifo-depth = <0x40>;
};