Overview of PHY/PCS/PMA/PMD. Hierarchy:

• LLC
• MAC
• Reconciliation
• MII
• PHY
  • PCS (Physical Coding Sublayer)
  • PMA (Physical Medium Attachment)
  • PMD (Physical Medium Dependent)
• MDI (Medium Dependent Interface)
• Medium

Links:

• !000BASE-T1
• IEEE P802.3ba
• Xilinx 10G Ethernet PCS/PMA v6.0
• Demystifying the MAC, PCS and PHY & how to measure their latency

Possible vendor offerings:

• link traffic counters
• RX (and TX) timestamping
• support for Ethernet flow control
• a dual-clock FIFO on the receive side
• IEEE 1588 (PTP) support
• support for options not strictly in conformance of the 10GbE spec such as shrinking the Ethernet preamble and/or interpacket gap to reduce latency between MAC and PHYs offering this support